The backplanes of TA 1000 and
TA 1069 are composed of slots with two
One assignment is used by the "Testtableau"
(a type of hardware debugger)
and for the CPU board, the second
assignment is used for all remaining
boards (ROM, RAM, I / O).
Testtableau and CPU are located on the
first two slots, the remaining slots
are used by ROM, RAM and I/O boards,
depending on the application
in different compositions.
In systems with two internal machines a
backplane with two independent
bus systems, arranged in a mirror image
manner, is used - Testtableau
and CPU occupy the first two and then the
last two, of the usable slots.
Müller created with two SN7483AN- (4-bit
adder), two SN7400N-,
two SN7486N-, four SN7450N-
and eight SN74H52N digital circuits
with four SN7475N- and eight SN74100N latches a
and with many other gates and other TTL
circuits the necessary control
unit, so that a total of 109 ICs (a 4-pin
included) form an 8-bit CPU
with a 16-bit address bus.